The present invention relates to a direct memory access controller and a method of controlling the direct memory access, and more particularly to a direct memory access controller suitable for an image processor and a method of controlling the direct memory access.
The direct memory access controller so operates that after a single direct memory access transfer has been finished, then a direct memory access transfer end interrupt to a CPU is outputted and then a top address for the next region is re-set for the direct memory access transfer. For this reason, an over-head of the program appears. FIG. 1 is a block diagram illustrative of the conventional direct access memory controller. This conventional direct access memory controller is disclosed in Japanese laid-open patent publication No. 8-221353.
The above conventional direct access memory controller is capable of a unidirectional transfer from a lower address to an upper address. If image data on the memory are processed, the over-heads of the programs are frequently caused, whereby it is difficult to realize an efficient operation.
In the above circumstances, it had been required to develop a novel direct access memory controller and a method of controlling a direct access memory free from the above problem.
Accordingly, it is an object of the present invention to provide a novel direct access memory controller free from the above problems.
It is a further object of the present invention to provide a novel direct access memory controller free from overhead of the program.
It is a still further object of the present invention to provide a novel direct access memory controller capable of efficient data transfer.
It is further more object of the present invention to provide a novel method of controlling a direct access memory free from the above problems.
It is moreover object of the present invention to provide a novel method of controlling a direct access memory free from overhead of the program.
It is another object of the present invention to provide a novel method of controlling a direct access memory capable of efficient data transfer.
The present invention provides a direct memory access controller used for carrying out a direct memory access transfer of data from a first memory to a second memory, wherein the direct memory access controller has a modulo address arithmetic unit for executing a modulo adjustment to transfer addresses of the first memory by computing a top transfer address of a next transfer datum which should be transferred following to a previously transferred datum which has been stored at a higher address than an address at which the next transfer datum is stored in the first memory, so that the direct memory access controller allows a continuous transfer of all of required data.
The above and other objects, features and advantages of the present invention will be apparent from the following descriptions.